MPSim: Comprehensive Verilog Verification Environment

CPUs have undergone a massive shift from their previous emphasis on increased clock speeds to their current focus on multi processing and multiple cores.

AXIOM’s MPSim is the first and only simulator architected from the ground-up to take advantage of these new multi-CPU hardware platforms, without requiring any change in existing products or methodologies and with no limitations on design style or capacity, while at the same time providing an integrated verification environment. While providing a competitive performance on single CPU platforms, MPSim truly accelerates simulation performance on multi-CPU machines. 

In situations where waveforms have to be viewed as soon as possible, the multi-CPU MPSim with its native waveform dump support offers un-matched performance.  With MPSim’s Multi-CPU capability, each CPU can dump out waveform data independently and debugger can merge all waveform files providing a transparent interface to the user, as if the simulation was running on a single CPU.

Common tasks performed during simulation such as waveform dumping and debugging, assertion analysis, testbench execution and coverage are also distributed over multiple cores resulting in significant acceleration. In customer benchmarks, up to 5X acceleration has been observed with MPSim when all tasks were distributed over four CPUs.

Multi-CPU runs on commercially available hardware and scales with advances in multi-core processor technology with no limitations on size or design styles

Some key features of MPSim multi-CPU architecture include:

• Automatic partitioning of design and applications
• Automatic partitioning for each test
• Auto learn mode to improve partition efficiency
• Supports design, testbench, waveform dumping, assertion, coverage and debugging for maximum productivity
• Ability to uncover corner case bugs in the design that would have been otherwise undetected, by generating significantly greater vectors in the same period of time as alternative products
• Fastest simulator in industry, providing ability to run long tests in days instead of weeks
• Increases designer's day time productivity by improving waveform dumping and simulation performance
• Integrated debugging of design, testbench and assertions
• Plug & Play compatible with existing products and methodologies with no limitations on design style or design capacity
  
  

MPSim can run 3-10 x more cycles resulting in more bugs found

Complete Verification Solution

MPSim comes integrated with Designer, the most advanced debugging and visualization environment; CTB, compiled testbench automation including SystemVerilog and OpenVera; C³, comprehensive coverage closure including SVA; and MCDV, multiple clock domain verification and analysis in a single kernel architecture for maximum performance and throughput.

MPSim: A Complete Verification Platform

UPF Support

The MPSim solution provides full support of the UPF format including power-off corruption, setting isolation signals, specifying retention capabilities for state-machines, as well as enhanced capabilities within its suite of debug tools and coverage of the power control mechanisms specified in the design and UPF file.

UPF provides a single low-power description that can be used in the design and verification process and fosters tool interoperability. Without a single low-power description, each step of the design process would need to rely on the error-prone and cumbersome process of translating multiple formats and proprietary commands, where the power intent could easily deviate from each other.

Full Compatibility and Standards Compliance

MPSim is fully compatible and can co-exist with Verilog simulators from other vendors. In addition to complete support of IEEE Verilog, MPSim also supports SystemVerilog, OpenVera, UPF, VMM, OVM, and SystemC.

Industry Proven

MPSim is production proven and many companies have taped out large and complex chips using MPSim for verification. Large chips with over one billion transistors have been verified exclusively with MPSim. Chips taped out with MPSim include  multi-processor chips including an eight CPU multi-processor chip,  networking and communication SOCs, and video processors.