What These Customers Are Saying

See what clients are saying about Axiom's produts and services:

Yuri Panchal MIPS Technologies
"This UVM Debug technology will seriously improve my code development time. When can you install this release?"
Krist Roginski Cortina Systems
"We at Cortina use Axiom for the entire verification flow, from block level simulation, to full-chip, to gate level full-chip, and finally to gate level full-chip with SDF annotation. We have taped out several chips using MPSim for RTL to gate level simulation. MPSim clearly provides the most comprehensive and best price/performance verification solution in a single package."
Roger Stenerson Triple Ring Technologies
"We selected Axiom’s MPSim because it came integrated with a very advanced and comprehensive debugger in a single kernel architecture and offered the best price/performance simulation/debugging option. Not only that, the AXIOM team helped us setup the complete Xilinx flow for running our simulations with the Xilinx ISE and provided the best support that I have ever seen from any EDA company."
Fen-Yu Su Principal Engineer, VLSI CADBay MicroSystems
"We successfully taped out our last chip that was verified using Axiom’s MPSim simulator. We are very impressed with MPSim’s performance. We have seen excellent performance while dumping waveforms and interactive debugging. The Designer debugger is one of the best I have seen in the industry."
Pravin Shah Matisse Networks
"We started using MPSim with our Testbuilder testbench environment to release several Networking FPGA’s. We transitioned over to SystemVerilog when VMM support was available from AXIOM and were very pleased with the speed of response and support provided by AXIOM in helping us make the transition to SystemVerilog. We have seen MPSim make significant progress in SystemVerilog compatibility. Our complex VMM based environment has now been extensively used on multiple FPGAs and we would say that the MPSim SystemVerilog is on par with our other simulators on SystemVerilog compatibility."
Atiq Raza Chairman and Chief Executive Officer, RMI
"AXIOM has taken a leadership role in the functional verification space by taking advantage of multi-CPU hardware to significantly improve simulation performance. MPSim provides a quantum gain in overall verification productivity necessary to overcome challenges faced by IC design teams working on complex SoC’s."
Chan Lee Vice President of VLSI Engineering, Ambarella
"The powerful analysis capabilities of Designer allows our engineers to more rapidly debug their simulation results."
Scott Sellers CTO/VP of Hardware Engineering, Azul Systems
"The powerful simulation oriented debugging GUI and analysis features of Designer have allowed our team to find more bugs earlier in RTL development."
Rajat Roy VP Product Development and GM of Access and Processor Solutions, RMI
"We are now using MPSim as the default production simulator and have successfully taped out a 40M gate design using this product. MPSim’s integrated OpenVera™, testbench, SystemVerilog assertion and robust debugging capabilities have provided us with an immediate improvement in verification productivity.”