Client Login | Customer Support | Contact Us
Home Products Technology Customers News & Events About Us
   
 
 
  PRODUCTS
   
  Overview
  MPSim: Comprehensive SystemVerilog Verification Environment
  Designer: Advanced Debug and Visualization Environment
  C3: Comprehensive Coverage Closure
  Compiled TestBench (CTB)
  MCDV: Multiple Clock Domain Verification and Analysis
   
 
 

C3: Comprehensive Coverage Closure

The biggest challenge in verification is to know when you are done or at least some knowledge of the level of verification achieved.

To support this goal, MPSim offers the most advanced coverage analysis in the industry.

MPSim’s comprehensive coverage closure (C3) tool is the industry’s most intelligent and advanced structural and functional coverage analysis tool, which allows the collection, merging, analyzing, customizing, and filtering of coverage results, and grading test diags based on that information.

MPSim’s C3 comprises of structural, functional and assertions’ coverage.

Structural coverage support includes line, block, expression, toggle, finite-state machine state and state transition coverage, while functional coverage support includes SystemVerilog and OpenVera high-level verification language coverpoint, sample, cross and transition coverage constructs, as well as attributes, options, and pre-defined tasks and functions. And to achieve a full circle of coverage closure, complete SystemVerilog Assertions’ (SVA) coverage support is included.

Some key features of the coverage analysis include:

  • Integrated intuitive coverage graphical interface
  • Smart constant propagation to eliminate false coverage paths
  • FSM state and state transition coverage emphasizing path analysis
  • Coverage equivalence extending coverage between equivalent hierarchical design trees
  • Design source color-coding based on coverage results
  • Visually easy-to-understand multi-level expression coverage representation
  • Identification and disabling of impossible case combinational pair sub-expression scenarios
  • Advanced functional coverage coverpoint, sample, cross and transition holes’ identification and reporting mechanism
  • SVA assertions’ coverage graphical interface working hand-in-hand with MPSim’s SVA interactive debugger environment
  • Powerful and extensive set of coverage filtering capabilities
  • Automated porting of coverage filtering between coverage types, across equivalent design trees, and from block-level to full-chip
  • Test grading based on all aspects of Coverage data

 
     
 
Copyright © 2010, Axiom Design Automation | info@axiom-da.com | Disclaimer | Sitemap | Contact Us Site Design By WebKnix