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AXIOM offers a range of integrated functional verification products that leverage multi-CPU technology to significantly improve performance, capacity and debugging of the logic verification process. The products address all the factors involved in an integrated verification environment including performance, productivity, testbench automation and verification closure.

  • MPSimMPSim is one of the fastest simulators providing native support for Verilog, SystemVerilog, OpenVera and SystemC. Many successful, complex chips have been taped-out based on MPSim flow. The industry’s first multi-CPU simulator, MPSim is tightly integrated with AXIOM’s debugger - Designer and Protometer IPs. With kernel level integration of waveform dumping calls, MPSim provides the fastest signal dumping performance.  Due to its native support for UPF, MPSim’s power aware capabilities enable early power switch network simulation.

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  • Designer – Designer provides advanced debugging environment for design, testbench and assertions to help locate and fix the most complex design bugs. The core front-end of all of AXIOM’s verification tools and IPs, Designer provides a seamless environment for debugging. Apart from source, schematic and FSM debugging, Designer has advanced capabilities to quickly trace unknowns, visualize memories, analyze clock domains, view source/transaction coverage or debug at transaction levels. Designer’s unique testbench debugger simplifies troubleshooting complex, multi-threaded OpenVera and SystemVerilog test-benches.

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  • Verifier – Verifier conducts formal assertion based verification offering the most advanced solvers in industry and being a static analysis tool, identifies synchronization errors in multi-clock designs quickly.  Not needing testbench, Verifier provides structural and functional checks.  It automatically generates assertions to verify synchronizer control logic and understands most common synchronizers or user defined synchronization modules.

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  • Protometer – This new breed of verification IPs hook up to the simulation signal interface and generate transaction and protocol coverage database, apart from checking for protocol signalling errors.  This nifty solution will enable quick debug and functional verification closure.  The package comes with a configurable coverage goal, transaction viewer plug-in and a functional coverage browser.  Protometer is available for all standard interfaces viz., PCIe, Ethernet, USB, AMBA, etc.

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